This invention relates to a method of determining a flatness of an electronic device substrate used in a mask blank, a method of producing the substrate adjusted in flatness, a method of producing a mask blank, a method of producing a transfer mask, and a polishing method. This invention also relates to an electronic device substrate (such as a mask blank substrate) having a high flatness and a high parallelism, a mask blank and a transfer mask using the substrate, and a polishing apparatus.
Upon production of a semiconductor integrated circuit device, a photolithography technique is used in a process of forming a wiring region and other various regions. In a photolithography process using the photolithography technique, a photomask is used as an original pattern for exposure. The photomask comprises a transparent substrate and a light shielding thin film formed thereon and having a pattern. The pattern of the light shielding thin film is transferred by an exposure apparatus onto a semiconductor wafer (or an objective substrate). Thus, the semiconductor integrated circuit device is produced. The pattern transferred onto the semiconductor wafer has characteristics depending upon a flatness of the photomask. Therefore, the transparent substrate used in the photomask is required to have a high flatness. The flatness of the transparent substrate is defined as a difference between the maximum height and the minimum height of a surface of the transparent substrate, more specifically, a difference between the maximum height and the minimum height of a measured surface with respect to a virtual absolute plane calculated from the measured surface by a least square method. At present, a high flatness on the order of 1 μm is achieved in the transparent substrate used in the photomask as a result of improvement of a polishing pad, improvement of abrasive grains, and control of a polishing condition.
Although such a high flatness of the transparent substrate is achieved as described above, the total flatness of a photomask blank as a material of the photomask is deteriorated by the thin film formed on the transparent substrate because the thin film itself has a film stress. The deterioration in total flatness of the photomask blank results in degradation of a pattern position accuracy when the thin film is patterned and the photomask is produced. Accordingly, when the pattern is transferred onto the semiconductor wafer, a pattern displacement error or a pattern defect will be caused to occur.
In view of the above, it is attempted to reduce the film stress of the thin film formed on the transparent substrate by changing a depositing condition or a film material. However, in a recent semiconductor integrated circuit more and more increased in density and accuracy, such a reduced film stress of the thin film is yet unnegligible. In particular, in order to obtain a desired optical characteristic, the thin film formed on the transparent substrate tends to be multilayered. It is therefore difficult to control the film stress of the thin film.
On the other hand, a transparent substrate for an electronic device is different in flatness one by one and its surface may have a convex or a concave shape.
If the photomask blank or the photomask is produced by the use of the transparent substrate different in shape, the photomask blank or the photomask is deteriorated in flatness. This results in degradation of a pattern position accuracy when the thin film is patterned and the photomask is produced. Accordingly, when the pattern is transferred onto the semiconductor wafer, a pattern displacement error or a pattern defect will be caused to occur.
Following the recent development of a VLSI device having a higher density and a higher accuracy, an electronic device substrate (such as a mask blank substrate) is required to have a microscopic or ultrafine surface as a substrate surface. The above-mentioned demand becomes more and more strict year by year.
In recent years, not only for a surface defect (such as a flaw) on the substrate surface and a surface roughness (smoothness) but also for a profile accuracy (flatness) of the substrate, requirements become more and more strict. There arises a demand for a mask blank substrate having an ultra high flatness.
For example, the mask blank substrate is disclosed in Japanese Unexamined Patent Publication JP 1-40267 A. In the publication, proposal is made of a precision polishing method intended to reduce the surface roughness of the substrate surface. The method is a so-called batch-type method in which a plurality of substrates are simultaneously polished. The substrates are polished by the use of an abrasive comprising cerium oxide as a main component and thereafter finished by polishing using colloidal silica. A double-sided polishing technique (a twin polishing technique) using a double-sided polishing apparatus (a twin polishing apparatus) is described.
In the double-sided polishing technique using the double-sided polishing apparatus, a substrate having a high smoothness can be obtained by the use of abrasive grains having a small particle size. However, it is difficult to maintain an accuracy of the surface table within a wide plane of the surface table. Since a plurality of substrates are polished while rotating and revolving together with a carrier, it is impossible to modify the flatness of each individual substrate.
Even if polishing is performed by the use of the double-sided polishing apparatus improved in accuracy of the surface table and by adjusting a surface table cooling method, a slurry supplying method, and a polishing condition (the rotation speed of the surface table, the rotation speed and the revolution speed of the carrier, and so on), the flatness of a principal surface of the substrate (the flatness of the principal surface of the substrate in an area except a 3 mm zone from a side surface of the substrate) obtained after polishing has a limit of 0.5 μm in absolute value.
A design rule of a semiconductor integrated circuit corresponding to 0.5 μm as the flatness of the substrate of is equal to 180 nm. For a next-generation semiconductor integrated circuit, a design rule is expected to be 130 nm, 100 nm, 70 nm, and a yet smaller value. As described above, however, it is difficult to achieve a high-flatness substrate having a flatness not greater than 0.25 μm and adapted to be used as a substrate for a (ArF, F2, EUV) mask corresponding to the design rule of the next-generation semiconductor integrated circuit.
Because of change in polishing condition (such as deterioration of the polishing pad and the abrasive grains) and because of the batch-type polishing method, it is difficult to produce a mask blank substrate at a high yield even if the flatness is between 0.5 μm and 1 μm. It is almost impossible to produce a high-flatness substrate having a flatness not greater than 0.5 μm, not greater than 0.25 μm, and so on adapted to the design rule of the next-generation semiconductor integrated circuit.
Following the recent development of a more and more miniaturized or finer pattern, a pattern width is reduced. As a consequence, the shape of a peripheral portion of the mask blank substrate affects a pattern position accuracy when the pattern on the mask is transferred to another substrate as an object by the use of a stepper. In this connection, it is desired that an entire area of the principal surface of the substrate (the principal surface of the substrate except the side surface and a chamfered face) has an excellent flatness. However, in the above-mentioned polishing method using the double-sided polishing apparatus, the flatness has a limit of about 1 μm.
Besides the above-mentioned polishing method using the double-sided polishing apparatus, JP 2002-46059 A discloses a polishing apparatus for a rectangular substrate. The polishing apparatus serves to flatten very small irregularities by uniformly removing a predetermined thickness of a surface of a wiring film or an insulator film formed on a rectangular large glass substrate of a liquid crystal display or a large-screen semiconductor sensor. The polishing apparatus includes a plurality of pressing means disposed on the side of a rear surface of the substrate. While the pressing means press the substrate against a polishing sheet, the substrate is rotated. Thus, the substrate is subjected to single-sided polishing. Each of the pressing means comprises a micrometer screw and a spring. By rotating the micrometer screw, an elastic force of the spring is adjusted to control a pressing force exerted upon the substrate.
The above-mentioned polishing apparatus is proposed to uniformly remove a part of the insulator film formed on a thin substrate having a thickness of 1.1 mm and is intended to improve the uniformity in thickness of the insulator film. However, for a thick substrate, such as a mask blank substrate, having a thickness of 6.5 mm (in case of a 6-inch substrate), the above-mentioned polishing apparatus can not effectively adjust the flatness of the substrate because the pressing force is insufficient. In the pressing means of the above-mentioned polishing apparatus, a spring thrust force must be changed depending upon the position of the micrometer screw. This can not easily be represented by data as a digital signal. Therefore, the pressing force is difficult to control.